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The introduction of the SMI handling code added in cset 9371 is
authorkaf24@firebug.cl.cam.ac.uk <kaf24@firebug.cl.cam.ac.uk>
Tue, 28 Mar 2006 12:45:08 +0000 (13:45 +0100)
committerkaf24@firebug.cl.cam.ac.uk <kaf24@firebug.cl.cam.ac.uk>
Tue, 28 Mar 2006 12:45:08 +0000 (13:45 +0100)
commit52c437a6da9be5b32ebcd77985fa44c3e6ec3115
tree77f7743a8a3e2566c4c30e2091a5fdf25fa4bdfatree | snapshot
parent6deec31297b4b48e001986951efc6bc2a42118b4commit | diff
The introduction of the SMI handling code added in cset 9371 is
"reversed", as in it actually clears the SMI bit in the VMCB. If you
have a new enough chip (or new BIOS), the SMI bit HAS TO BE SET or it
gives exitcode -1.

Signed-off-by: Mats Petersson <mats.petersson@amd.com>
xen/arch/x86/hvm/svm/vmcb.c diff | blob | history
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